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 MAC12D, MAC12M, MAC12N
Preferred Device
Triacs
Silicon Bidirectional Thyristors
Designed for high performance full-wave ac control applications where high noise immunity and commutating di/dt are required. * Blocking Voltage to 800 Volts * On-State Current Rating of 12 Amperes RMS at 70C * Uniform Gate Trigger Currents in Three Quadrants, Q1, Q2, and Q3 * High Immunity to dv/dt -- 250 V/s Minimum at 125C * High Commutating di/dt -- 6.5 A/ms Minimum at 125C * Industry Standard TO-220 AB Package * High Surge Current Capability -- 100 Amperes * Device Marking: Logo, Device Type, e.g., MAC12D, Date Code
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TRIACS 12 AMPERES RMS 400 thru 800 VOLTS
MT2 G
MT1
MAXIMUM RATINGS (TJ = 25C unless otherwise noted)
Rating Peak Repetitive Off-State Voltage(1) (TJ = -40 to 125C, Sine Wave, 50 to 60 Hz, Gate Open) MAC12D MAC12M MAC12N On-State RMS Current (All Conduction Angles; TC = 70C) Peak Non-Repetitive Surge Current (One Full Cycle, 60 Hz, TJ = 125C) Circuit Fusing Consideration (t = 8.33 ms) Peak Gate Power (Pulse Width 1.0 s, TC = 80C) Average Gate Power (t = 8.3 ms, TC = 80C) Operating Junction Temperature Range Storage Temperature Range Symbol VDRM, VRRM 400 600 800 IT(RMS) ITSM I2t PGM PG(AV) TJ Tstg 12 100 41 16 0.35 - 40 to +125 - 40 to +150 A A A2sec Watts Watts 1 C C 2 3 4 1 Value Unit Volts 4
2
3
TO-220AB CASE 221A STYLE 4
PIN ASSIGNMENT
Main Terminal 1 Main Terminal 2 Gate Main Terminal 2
(1) VDRM and VRRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded.
ORDERING INFORMATION
Device MAC12D MAC12M MAC12N Package TO220AB TO220AB TO220AB Shipping 50 Units/Rail 50 Units/Rail 50 Units/Rail
Preferred devices are recommended choices for future use and best overall value.
(c) Semiconductor Components Industries, LLC, 1999
1
September, 1999 - Rev. 3
Publication Order Number: MAC12/D
MAC12D, MAC12M, MAC12N
THERMAL CHARACTERISTICS
Characteristic Thermal Resistance -- Junction to Case -- Junction to Ambient Maximum Lead Temperature for Soldering Purposes 1/8 from Case for 10 Seconds Symbol RJC RJA TL Value 2.2 62.5 260 C Unit C/W
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted; Electricals apply in both directions)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Peak Repetitive Blocking Current (VD = Rated VDRM, VRRM, Gate Open) TJ = 25C TJ = 125C IDRM, IRRM -- -- -- -- 0.01 2.0 mA
ON CHARACTERISTICS
Peak On-State Voltage(1) (ITM =
"17 A) "150 mA)
VTM IGT
-- 5.0 5.0 5.0
-- 13 13 13 20 20 30 20 0.78 0.70 0.71
1.85 35 35 35 40 50 80 50
Volts mA
Gate Trigger Current (Continuous dc) (VD = 12 V, RL = 100 ) MT2(+), G(+) MT2(+), G(-) MT2(-), G(-) Hold Current (VD = 12 V, Gate Open, Initiating Current = Latch Current (VD = 24 V, IG = 35 mA) MT2(+), G(+) MT2(+), G(-) MT2(-), G(-) Gate Trigger Voltage (Continuous dc) (VD = 12 V, RL = 100 ) MT2(+), G(+) MT2(+), G(-) MT2(-), G(-)
IH IL
-- -- -- --
mA mA
VGT 0.5 0.5 0.5 1.5 1.5 1.5
Volts
DYNAMIC CHARACTERISTICS
Rate of Change of Commutating Current (VD = 400 V, ITM = 4.4A, Commutating dv/dt = 18 V/s, Gate Open, TJ = 125C, f = 250 Hz, No Snubber) Critical Rate of Rise of Off-State Voltage (VD = Rated VDRM, Exponential Waveform, Gate Open, TJ = 125C) Repetitive Critical Rate of Rise of On-State Current IPK = 50 A; PW = 40 sec; diG/dt = 200 mA/sec; f = 60 Hz (1) Pulse Test: Pulse Width 2.0 ms, Duty Cycle 2%. (di/dt)c 6.5 -- -- A/ms
dv/dt di/dt
250 --
500 --
-- 10
V/s A/s
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MAC12D, MAC12M, MAC12N
Voltage Current Characteristic of Triacs (Bidirectional Device)
+ Current Quadrant 1 MainTerminal 2 +
Symbol
VDRM IDRM VRRM IRRM VTM IH
Parameter
Peak Repetitive Forward Off State Voltage Peak Forward Blocking Current Peak Repetitive Reverse Off State Voltage Peak Reverse Blocking Current Maximum On State Voltage Holding Current IH Quadrant 3 VTM MainTerminal 2 - IRRM at VRRM on state
VTM IH
off state
+ Voltage IDRM at VDRM
Quadrant Definitions for a Triac
MT2 POSITIVE (Positive Half Cycle) +
(+) MT2
(+) MT2
Quadrant II
(-) IGT GATE MT1 REF
(+) IGT GATE MT1 REF
Quadrant I
IGT - (-) MT2 (-) MT2
+ IGT
Quadrant III
(-) IGT GATE MT1 REF
(+) IGT GATE MT1 REF
Quadrant IV
- MT2 NEGATIVE (Negative Half Cycle) All polarities are referenced to MT1. With in-phase signals (using standard AC lines) quadrants I and III are used.
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3
MAC12D, MAC12M, MAC12N
100 VGT, GATE TRIGGER VOLTAGE (VOLT) 5 20 35 50 65 80 95 TJ, JUNCTION TEMPERATURE (C) 110 125 IGT, GATE TRIGGER CURRENT (mA) 1.10 1.00 Q3 0.90 Q1 0.80 Q2 0.70 0.60 0.50 0.40 - 40 - 25 - 10 5 20 35 50 65 80 95 TJ, JUNCTION TEMPERATURE (C) 110 125
Q3 Q2 Q1 10
1 - 40 - 25 - 10
Figure 1. Typical Gate Trigger Current versus Junction Temperature
100 100
Figure 2. Typical Gate Trigger Voltage versus Junction Temperature
HOLDING CURRENT (mA)
MT2 POSITIVE
LATCHING CURRENT (mA)
Q2 Q1 10 Q3
10 MT2 NEGATIVE
1 - 40 - 25 - 10
5 20 35 50 65 80 95 TJ, JUNCTION TEMPERATURE (C)
110
125
1 - 40 - 25 - 10
5 20 35 50 65 80 TJ, JUNCTION TEMPERATURE (C)
95
110
125
Figure 3. Typical Holding Current versus Junction Temperature
125 TC, CASE TEMPERATURE (C) 120, 90, 60, 30 110 P(AV), AVERAGE POWER DISSIPATION (WATTS) 20 18 16 14 12 10 8 6 4 2 0 0
Figure 4. Typical Latching Current versus Junction Temperature
DC 180 120
95 180 80 DC 65 0 2 4 6 8 10 IT(RMS), RMS ON-STATE CURRENT (AMP) 12
90 60 30
2 4 6 8 10 IT(AV), AVERAGE ON-STATE CURRENT (AMP)
12
Figure 5. Typical RMS Current Derating
Figure 6. On-State Power Dissipation
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4
MAC12D, MAC12M, MAC12N
100 I T, INSTANTANEOUS ON-STATE CURRENT (AMP) TYPICAL @ TJ = 25C MAXIMUM @ TJ = 125C 10 r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) 1
0.1
MAXIMUM @ TJ = 25C 1
0.01
0.1
1
10 100 t, TIME (ms)
1000
10000
Figure 8. Typical Thermal Response
0.1 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 VT, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS) 5
Figure 7. Typical On-State Characteristics
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MAC12D, MAC12M, MAC12N
PACKAGE DIMENSIONS
TO-220AB CASE 221A-09 ISSUE Z
-T- C T
4
SEATING PLANE
S
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.018 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 --- --- 0.080 MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.46 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 --- --- 2.04
Q
123
A U K
H Z L V G D N R J
STYLE 4: PIN 1. 2. 3. 4.
MAIN TERMINAL 1 MAIN TERMINAL 2 GATE MAIN TERMINAL 2
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6
MAC12D, MAC12M, MAC12N
Notes
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7
MAC12D, MAC12M, MAC12N
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com Fax Response Line: 303-675-2167 or 800-344-3810 Toll Free USA/Canada N. American Technical Support: 800-282-9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor - European Support German Phone: (+1) 303-308-7140 (M-F 1:00pm to 5:00pm Munich Time) Email: ONlit-german@hibbertco.com French Phone: (+1) 303-308-7141 (M-F 1:00pm to 5:00pm Toulouse Time) Email: ONlit-french@hibbertco.com English Phone: (+1) 303-308-7142 (M-F 12:00pm to 5:00pm UK Time) Email: ONlit@hibbertco.com EUROPEAN TOLL-FREE ACCESS*: 00-800-4422-3781 *Available from Germany, France, Italy, England, Ireland CENTRAL/SOUTH AMERICA: Spanish Phone: 303-308-7143 (Mon-Fri 8:00am to 5:00pm MST) Email: ONlit-spanish@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor - Asia Support Phone: 303-675-2121 (Tue-Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001-800-4422-3781 Email: ONlit-asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-8549 Phone: 81-3-5740-2745 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local Sales Representative.
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8
MAC12/D


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